Vera Rubin NVL72’s First MLPerf: 3.7× GB300 on Qwen3-VL — and the AgentX Tokens-per-Megawatt Asterisk

Last week’s d-Matrix Raptor note was decode silicon borrowing NVIDIA’s rack. Tonight is the other side of that whiteboard: what the NVL72 tray itself does when MLCommons opens the books, plus the Sep 15 AI Infra Summit numbers that try to reframe the unit of work as tokens per megawatt.

On September 16, 2026, NVIDIA published Vera Rubin NVL72’s first MLPerf Inference v6.1 preview results. Same window: SemiAnalysis AgentX agentic tok/MW claims, Lambda’s first public DSX MaxLPS validation on Blackwell, and CoreWeave bringing up multi-rack Vera Rubin NVL72 on its cloud. Primary sources: NVIDIA MLPerf blog, AI Infra Summit / DSX / AgentX blog, CoreWeave multi-rack PR, results retrieved from mlcommons.org per NVIDIA’s citations.

Spec sheet (named numbers)

Preview results are peer-reviewed MLPerf entries, but they are still early silicon + early software. Treat the AgentX and MaxLPS lines as a separate methodology column from MLPerf Closed.

What the MLPerf table actually says

Three levers show up in NVIDIA’s own framing, and they map cleanly to how I write capacity tickets:

1. System performance. Rubin NVL72’s first preview beats GB300 NVL72 by up to 3.7× on Qwen3-VL and 2.5× on DeepSeek-R1. Those are MoE-heavy, multi-scenario workloads — not a single chat prompt. The stack callouts matter: Dynamo + vLLM on the VL path, TensorRT-LLM on the reasoning path. If your fleet is one serving stack, do not paste the other stack’s multiplier into the spreadsheet.
2. Scaling efficiency. The GB300 four-rack DeepSeek-R1 offline line (99% from 72→288 GPUs) is the boring number I care about most. Peak tok/s that collapses when you add racks is a tax on every interconnect and orchestrator bug you have not found yet. Near-linear scale on a Closed Division run is the claim that “more GPUs ≈ more revenue” is not fantasy for that submission.
3. Software velocity. Up to 1.6× on GB300 Qwen3-VL from v6.0→v6.1 without a new tray is the reminder that InferenceX / MLPerf deltas keep moving after the BOM freezes. Lower KV precision, kernel fusion, and disaggregated prefill/decode are the named levers. Post-deadline GPT-OSS-120B and DLRMv3 gains are explicitly not MLCommons-verified yet — leave them out of any contract language.

NVIDIA also points at NVFP4 across weights, attention, and KV cache, and at sixth-generation NVLink / NVLink Switch (vendor: 10× packet rate and 3× lower latency vs off-the-shelf Ethernet) as the rack fabric that makes expert parallelism and disaggregation pay off. That is the same NVL72 domain Groq 3 LPX and Raptor are trying to sit next to — different decode hypotheses, one landlord for the switch tray.

AgentX and MaxLPS are not MLPerf

MLPerf Closed is request-shaped: offline, server, interactive scenarios with peer review. AgentX is trajectory-shaped: SemiAnalysis traces that keep context growth, tool-call delay, and sub-agent spawn. NVIDIA’s Summit blog says a single agent session can accumulate ~15× the tokens of a simple chat request. On that corpus, Vera Rubin NVL72 is claimed at up to 30× tok/MW vs GB300 on DeepSeek V4 Pro, with up to 45× lower $/M tokens.

I will not collapse 30× into the same cell as 3.7×. Different denominator (megawatts and agent trajectories vs Closed Division throughput), different governance (SemiAnalysis dashboard + NVIDIA implementation notes vs MLCommons). Useful as an agent-fleet stress test, not as a substitute for the Qwen3-VL / DeepSeek-R1 table.

DSX MaxLPS is the power scheduler story. Lambda’s Blackwell validation: fit 19 nodes in the power budget you thought was 16, pick up ~1M tok/s cluster-wide (4M→5M, +24%) and +23% perf/W. The Rubin forward claim is up to +40% GPUs in the same megawatt envelope “in the right deployment environments.” That is a facility-controls product, not a Tensor Core. If your site is hard-capped on MW, MaxLPS and Flex (Emerald AI / Silicon Valley Power flexible-load demo in the same blog) belong on the same ticket as HBM generation.

The Summit blog also restates the Groq 3 LPX pairing: up to 35× tok/MW vs GB200 for 2T+ long-context paths, and 2,529 tok/s/user at 100K on Qwen 3.8 27B. Read that next to my earlier LPX post the same way I read Raptor: SRAM decode under the NVIDIA roof, not a third interconnect politics.

CoreWeave: the multi-rack receipt

Same day as the MLPerf post, CoreWeave said it brought up multi-rack Vera Rubin NVL72 — hundreds of Rubin GPUs as one scale-out cluster. Per-rack BOM in their PR: 72 Rubin + 36 Vera, NVLink 6, ConnectX-9, BlueField-4; two ConnectX-9 per GPU for 1.6 Tb/s scale-out bandwidth per GPU across multiplane / multirail Spectrum-X. That is the operational receipt that “preview MLPerf” is not only a lab submission lane. It does not independently verify the 3.7× line; it does say the tray is past single-rack bring-up at at least one AI cloud.

Caveats I would write into any Rubin capacity ticket

1. Preview ≠ steady-state. First MLPerf preview submissions improve with software. Budget a re-run date, not a frozen multiplier.
2. Stack-specific deltas. 3.7× is Qwen3-VL with vLLM+Dynamo; 2.5× is DeepSeek-R1 with TensorRT-LLM. Match your serving stack before you multiply.
3. AgentX ≠ MLPerf. Keep tok/MW agent numbers in a separate column with methodology notes. Governance and corpus matter as much as the headline.
4. MaxLPS “+40% GPUs” is conditional. Lambda’s measured +24% tok/s is on Blackwell under a named power budget; the Rubin 40% is a forward claim for the right site.
5. Fungibility is the product pitch. Same NVL72 domain for training and inference is the reason Fusion partners (Raptor, NVHBM) and LPX keep showing up in the same blogs. Price the full rack (Vera + NVSwitch + NICs + cooling + power software), not the GPU sticker alone.
6. Not a Helios substitute. Helios UALoE is still the open-protocol Ethernet-bridge lane. Rubin MLPerf does not change UALink politics.

How I would use this tomorrow morning

If you already run Blackwell NVL72, the actionable trio is: (a) pull the Closed Division entries 6.1-0106 / 6.1-0074 and compare your model mix to Qwen3-VL and DeepSeek-R1, (b) ask whether disaggregated prefill/decode + Dynamo is on your roadmap before you assume Rubin’s multiplier, and (c) put MaxLPS / site MW headroom on the same slide as HBM and NVLink generation. If you are choosing among LPX, Raptor, and a full Rubin tray, MLPerf answers the GPU-rack throughput question; AgentX answers a different one about agent trajectories per megawatt; neither answers who owns your scale-up switch.

Create-only. Specs above are from NVIDIA’s Sep 16 MLPerf blog (citing MLCommons entries retrieved that day), NVIDIA’s Sep 15 AI Infra Summit blog, and CoreWeave’s Sep 16 multi-rack PR. Update when MLCommons publishes fuller result tables or when independent AgentX submissions from other vendors land on the same dashboard.

Sources: NVIDIA MLPerf · NVIDIA AI Infra Summit / DSX / AgentX · CoreWeave · MLCommons.

Anpoo Sivanadi, Staff Software Engineer