Lessengers’ 3.2T Glass NPO: TGVs, Lens-Free DOW, and the Millimeters-from-ASIC Bet

Last night’s PicoJool 200G GaAs VCSEL note answered the emitter purchase: will short-reach scale-up stay on multi-mode lasers that already ship in the millions. This morning is the package purchase underneath the next switch generation — how you put optics millimeters from the ASIC without drowning the row in front-panel pluggables.

On September 21, 2026, at ECOC in Málaga, Lessengers unveiled a 3.2 Tbps near-packaged optics (NPO) platform built on a glass packaging core and the company’s Direct Optical Wiring (DOW) polymer waveguides. Secondary coverage on September 25 framed the same sheet for AI/HPC switch chassis: density into 51.2T and 102.4T generations, immersion-native sealing, and a vendor claim of up to 50% power savings versus conventional packaging approaches.

Primary sources: Lessengers’ BusinessWire ECOC release (mirrored), Converge Digest’s ECOC write-up, The Data Center Engineer’s Sep 25 summary, and Lessengers’ earlier SC25 immersion-cooled 800G NPO / Alphawave demo note for DOW pedigree. Numbers below are vendor claims until your own switch OEM and link-qualification tickets publish measured BER, insertion loss, pJ/bit, and yield.

Spec sheet (named numbers)

That is a different CapEx sentence from PicoJool’s 200G VCSEL (the laser diode), NewPhotonics NPG102 + Tower (laser-integrated PIC engines shipping into 800G–1.6T), or Lightmatter Passage L20 CPX (BiDi NPO that halves a fiber plant). Those posts are emitters, engines, and MSA packaging. Lessengers is the glass + polymer-waveguide NPO module bet: can you socket optics next to the switch ASIC, survive immersion, and hit 3.2T density without lens assemblies and active aligners.

What “millimeters from the ASIC” is supposed to buy

Front-panel pluggables won the last decade because they were serviceable and multi-sourced. At 200G/lane and the road to 400G/lane, the electrical SerDes run from switch silicon to the faceplate is the power and signal-integrity tax. NPO and CPO exist to shorten that run. Lessengers’ claim is narrower than “optics everywhere”: put a 3.2T engine on a glass core with TGVs, route light through planar + polymer waveguides, and keep the optical junctions hermetically sealed so the same module can sit in an immersion tank.

Three purchase sentences sit inside that architecture:

1. Density — one 3.2T engine is how a switch vendor stacks toward 51.2T (sixteen engines) and 102.4T (thirty-two) without doubling faceplate real estate.
2. Manufacturing — DOW’s “no lenses / no active alignment” pitch is a yield and CapEx claim for module partners, not a BER claim. Ask for known-good-module yield under your temp/immersion quals.
3. Cooling — SC25 already showed an 800G DOW NPO submerged with an Alphawave I/O chiplet. The 3.2T PR extends that hermetic story; it does not publish a 3.2T immersion BER ticket.

This sits next to fabric and memory work like Astera Leo X and open scale-up like Cornelis ACF + Delos: different layers, same question of how bits leave the tray without melting the power budget.

Glass vs organic is the mechanical asterisk

Organic substrates warp when the ASIC and optics see workload-driven thermal swings. Glass’s lower CTE mismatch with silicon is why advanced packaging teams keep talking about glass cores and TGVs for high-density electrical/optical fan-out. Lessengers’ thesis is that mechanical stability is not a packaging footnote — it is the difference between a coupling that stays aligned through a training run and one that drifts into FEC cliffs.

Treat that as a checklist item, not a slogan:

1. Coupling stability vs temperature — demand eye / BER sweeps across your immersion or cold-plate envelope, not a room-temp demo photo.
2. TGV electrical budget — glass vias are the electrical path from ASIC to optics; ask for loss, crosstalk, and reliability data at your SerDes rate.
3. Waveguide loss stack — planar glass path + DOW polymer path + fiber plant; get a written link budget at the 3.2T operating point.
4. Socket / service model — “open, socketable ecosystem” is the PR phrase; confirm which switch OEM owns the socket, CMIS story, and field-replace procedure.

Where it sits next to PicoJool, NewPhotonics, and Lightmatter

Six related tickets. Lessengers does not replace PicoJool’s emitter math or NewPhotonics’ PIC sheet. It answers whether the module that sits next to the switch ASIC can be glass + DOW at 3.2T with immersion as a first-class constraint.

Caveats for a Lessengers ticket this week

1. ECOC unveil ≠ shipping PLU. The PR invites engineering evaluations; there is no volume date, SKU list, or named switch OEM design-win in the Sep 21 text.
2. “Up to 50% power savings” is a vendor claim — demand a switch-level comparison (baseline pluggable vs this NPO) at your lane rate and FEC, not a brochure percentage.
3. No lane recipe in the PR. Unlike PicoJool’s explicit 8×200 / 16×100 / 32×50 paths, Lessengers has not published 3.2T lane count, modulation, or reach class here. Ask before you model faceplate math.
4. Immersion-native is pedigree + claim. SC25 proved 800G submerged DOW; treat 3.2T immersion as an extension that still needs your coolant chemistry and BER ticket.
5. Not a rematch of Lightmatter or NewPhotonics. Lightmatter is BiDi NPO / fiber plant; NewPhotonics is InP-integrated PIC engines; Lessengers is glass substrate + polymer DOW packaging.
6. Do not confuse with killed Huawei Atlas / Ascend SuperPoD / Hi-ONE NPO amplification. That lane stays closed here.
7. Not Marvell’s 2nm 400G/lane ECOC demos. Marvell is DSP/silicon roadmap; Lessengers is the module package next to the ASIC.

How I would evaluate if I ran the hall

1. Get a written sampling matrix: engine vs detachable NPO, host ASIC / chiplet partner, fiber plant, target BER, and immersion vs cold-plate path.
2. Ask for the missing lane sheet — how many lanes, what modulation, what reach — before you argue “3.2T density” into a 51.2T/102.4T BOM.
3. Put the same power and BER test next to whatever pluggable 1.6T/3.2T path and PIC/CPO path you already track from NewPhotonics or Lightmatter; keep the layers separate.
4. Score manufacturability claims (no active align) with yield data from a module partner, not a booth demo.
5. Budget the ECOC story as architecture to evaluate, not as proof the 3.2T engine already won the switch chassis.

If you are buying the next AI switch generation’s optics package, the useful question is no longer “can NPO sit near the ASIC in a press release.” It is whether Lessengers’ glass TGV core, lens-free DOW waveguides, and immersion-native seal survive your BER, thermal, and serviceability gates before front-panel pluggables run out of power and faceplate.

Create-only. Specs and dates from Lessengers’ Sep 21 ECOC 3.2T glass-substrate NPO release, Converge Digest’s ECOC write-up, The Data Center Engineer’s Sep 25 summary, and Lessengers’ SC25 immersion-cooled 800G NPO note. Density, power, coupling, and immersion numbers are vendor claims until your own switch OEM and link-qualification tickets publish measured BER, insertion loss, pJ/bit, and yield.

Sources: BusinessWire / Wedbush mirror · Converge Digest · Data Center Engineer · Lessengers SC25 immersion 800G.

Anpoo Sivanadi, Staff Software Engineer